1. Field of the Invention
The present invention relates to a thin film transistor (TFT) array substrate included in a display device driven in an active matrix driving mode, and more particularly to a method for manufacturing a TFT array substrate having enhanced reliability.
2. Discussion of the Related Art
With the recent development of information-dependent society, the field of displays to visually express electrical information signals has rapidly developed. As a result, research to develop various flat display devices having superior thinness, lightness, and low power consumption is being conducted.
Representative examples of such flat display devices include a liquid crystal display (LCD), a plasma display panel (PDP), a field emission display (FED), an electro luminescent display (ELD), an electro-wetting display (EWD), an organic light emitting display (OLED), and the like.
These flat display devices commonly include, as an essential constituent element thereof, a flat display panel to realize an image. The flat display panel has a structure in which two substrates are assembled to face each other under the condition that an inherent luminous material or polarizing material is interposed between the substrates.
In the case of a display device driven in an active matrix driving mode, in which a plurality of pixels is individually driven, one of the two substrates thereof is a thin film transistor (TFT) array substrate.
The TFT array substrate includes gate lines and data lines, which extend to intersect with each other in order to define a plurality of pixel areas, and a plurality of TFTs formed at respective intersections of the gate lines and data lines, to correspond to respective pixel areas.
Each TFT includes a gate electrode, an active layer overlapping with at least a portion of the gate electrode, and source and drain electrodes respectively contacting opposite sides of the active layer.
Meanwhile, each data line is formed to have a multilayer structure including a metal layer made of copper (Cu) in order to reduce resistance of the data line.
In connection with this, the source and drain electrodes are also formed in the form of a multilayer structure including a metal layer made of copper (Cu) because the source and drain electrodes are formed simultaneously with the data lines in order to reduce the number of mask processes to be performed.
FIG. 1 is a process view showing a process for forming source and drain electrodes in a method for manufacturing a general TFT array substrate.
As shown in FIG. 1, a gate electrode GE is formed on a substrate 11. A gate insulating film 12 is then formed over the substrate 11, to cover the gate electrode GE. Thereafter, an active layer ACT is formed on the gate insulating film 12, to overlap with the gate electrode GE. First and second metal layers L1 and L2 are then formed over the gate insulating film 12, to cover the active layer ACT. In this case, one of the first and second metal layers L1 and L2 (for example, the second metal layer L2) is made of copper (Cu).
Subsequently, the first and second metal layers L1 and L2 are patterned under the condition that a mask layer 15 including an opening corresponding to a channel area CA of the active layer ACT has been formed on the second metal layer L2, to form source and drain electrodes SE and DE respectively constituted by the first and second metal layers L1 and L2.
During patterning of the first and second metal layers L1 and L2, the channel area CA of the active layer ACT is exposed. As a result, copper (Cu) ions of the second metal layer L2 (indicated by solid arrows in FIG. 1) may be easily introduced into the exposed channel area CA of the active layer ACT.
That is, the copper (Cu) ions of the second metal layer L2 are absorbed or diffused into the channel area CA of the active layer ACT, thereby causing the band gap of the active layer ACT to be incorrect. As a result, characteristics of the TFT are degraded and, as such, reliability of the TFT array substrate is degraded.